10CS833 VLSI Design and Algorithms syllabus for CS


Part A
Unit-1 Digital Systems and VLSI 6 hours

Why design Integrated Circuits? Integrated Circuits manufacturing, CMOS Technology, Integrated Circuit Design Techniques, IP-based Design.

Unit-2 Fabrication and Devices 8 hours

Fabrication Processes, Transistors, Wires and vias, SCMOS Design Rules, Layout design and tools.

Unit-3 Logic Gates – 1 6 hours

Combinatorial logic functions, Static Complementary gates, Switch Logic.

Unit-4 Logic Gates – 2 6 hours

Alternative gate Circuits, Low Power gates, Delay through resistive interconnect; Delay through inductive interconnect, Design for yield, Gates as IP.

Part B
Unit-5 Combinational Logic Networks 6 hours

Standard cell-based layout, Combinatorial network delay, Logic and interconnect design, Power Optimization, Switch logic networks, Combinational logic testing.

Unit-6 Sequential Machines 6 hours

Latches and Flip-flops, Sequential systems and clocking disciplines, Clock generators, Sequential systems design, Power optimization, Design validation, Sequential testing.

Unit-7 Architecture Design 6 hours

Register Transfer design, High Level Synthesis,Architecture for Low Power, Architecture testing.

Unit-8 Design Problems and Algorithms 8 hours

Placement and Partitioning: Circuit Representation, Wire-length Estimation, Types of Placement Problems, Placement Algorithms, Constructive Placement, Iterative Improvement, Partitioning, The Kernighan-Lin Partitioning Algorithm. Floor Planning: Concepts, Shape functions and floor plan sizing.Routing: Types of Local Routing Problems, Area Routing, Channel Routing, Introduction to Global Routing, Algorithms for Global Routing

Last Updated: Tuesday, January 24, 2023